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1. Automatic FPGA-PCB Linking - Verifying that the Projects are Linked

   Verification that the automatic linking of the projects has been successful can be made from two places: By interrogating the Sub-Design Links region of the Component Properties dialog, for the FPGA ...

   admin - 01/23/2014 - 13:29

2. Automatic FPGA-PCB Linking - Verifying that the Projects are Linked

   Verification that the automatic linking of the projects has been successful can be made from two places: By interrogating the Sub-Design Links region of the Component Properties dialog, for the FPGA ...

   admin - 09/13/2017 - 15:32