Physical memory is connected to the processor's External Memory interface. Peripheral devices are connected to the processor's Peripheral I/O interface. The following linked pages explore the methods of connection, from a single slave device, through to a range of memory and peripheral devices – accessed by single or multiple processors.
Note: The following information is based on using an OpenBus System to 'capture' the main processor system of your FPGA design. The principles of connection also apply for schematic-based FPGA design.