The TSK3000A is a 32-bit, Wishbone-compatible, RISC processor. Most instructions are 32-bits wide and execute in a single clock cycle. In addition to fast register access, the TSK3000A features a user-definable amount of zero-wait state block RAM, with true dual-port access.
The TSK3000A has been specifically designed to simplify the development of 32-bit systems targeted for FPGA implementation and to allow the migration of existing 8-bit systems to the 32-bit domain with relative ease and low-risk. As a result, complications typically associated with 32-bit system design, such as complex memory management, are minimized.
The TSK3000A, although a "classic RISC" processor and internally based on the Harvard architecture, features a greatly simplified memory structure and sophisticated interrupt handling to make coding simpler. The processor also simplifies the connection of peripherals with support for the Wishbone bus.
The TSK3000A can be used with any FPGA device of suitable capacity supported by Altium Designer, giving a completely device and FPGA vendor-independent 32-bit system hardware platform.
- 5-stage pipelined RISC processor
- 32x32- to 64-bit hardware multiplier, signed and unsigned
- 32x32-bit hardware divider
- 32-bit single-cycle barrel shifter
- 32 input interrupts, individually configurable to be level or edge sensitive and used in one of two modes:
- Standard Mode – all interrupts jump to the same, configurable base vector
- Vectored Mode – providing 32 vectored priority interrupts, each jumping to a separate interrupt vector
- Internal Harvard architecture with simplified external memory access
- 4GByte address space
- Wishbone I/O and memory ports for simplified peripheral connection
- Full Viper-based software development tool chain – C compiler/assembler/source-level debugger/profiler
- C-code compatible with other Altium Designer 8-bit and 32-bit Wishbone-compliant processor cores, for easy design migration
- FPGA device-independent implementation
From an OpenBus System document, the TSK3000A processor can be found in the Processors region of the OpenBus Palette panel.
From a schematic document, the TSK3000A processor can be found in the FPGA 32-Bit Processors integrated library (
FPGA 32-Bit Processors.IntLib), located in the
\Library\Fpga folder of the installation.