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  1. WB_DUALMASTER - Configurable Wishbone Dual Master

    Figure 1. WB_DUALMASTER - Configurable Wishbone Dual Master. The WB_DUALMASTER peripheral ... in more detail: Pin Description Interfacing Configuration See Also WB_MULTIMASTER ...

    admin - 11/06/2013 - 09:09

  2. WB_DUALMASTER - Configurable Wishbone Dual Master

    Figure 1. WB_DUALMASTER - Configurable Wishbone Dual Master. The WB_DUALMASTER peripheral ... in more detail: Pin Description Interfacing Configuration See Also WB_MULTIMASTER ...

    admin - 09/13/2017 - 15:32

  3. WB_DUALMASTER - Interfacing

    ... configurable Wishbone Dual Master component to connect two 32-bit processors (TSK3000As) to the Static RAM located on a daughter board. ... to the physical memory through use of an appropriately-configured Memory Controller which, in this example, is configured to be an ...

    admin - 11/06/2013 - 09:09

  4. WB_DUALMASTER - Interfacing

    ... configurable Wishbone Dual Master component to connect two 32-bit processors (TSK3000As) to the Static RAM located on a daughter board. ... to the physical memory through use of an appropriately-configured Memory Controller which, in this example, is configured to be an ...

    admin - 09/13/2017 - 15:32

  5. WB_INTERCON - Interfacing

    ... SRAM is connected to the interconnect via an appropriately-configured Memory Controller component (WB_MEM_CTRL). Figure 1. ... by using both a configurable Wishbone Dual Master component (WB_DUALMASTER) and a configurable Wishbone Interconnect component ...

    admin - 09/13/2017 - 15:32

  6. WB_INTERCON - Interfacing

    ... SRAM is connected to the interconnect via an appropriately-configured Memory Controller component (WB_MEM_CTRL). Figure 1. ... by using both a configurable Wishbone Dual Master component (WB_DUALMASTER) and a configurable Wishbone Interconnect component ...

    admin - 11/06/2013 - 09:09

  7. WB_MULTIMASTER - Interfacing

    ... 1 shows an example of using a configurable Wishbone Multi-Master to share access to the same physical SRAM between one 32-bit processor (a Nios II) and, although not shown, two memory-based peripheral ... - Configurable Wishbone Memory Controller WB_DUALMASTER - Configurable Wishbone Dual Master ...

    admin - 09/13/2017 - 15:32

  8. WB_INTERCON - Configurable Wishbone Interconnect

    Figure 1. WB_INTERCON - Configurable Wishbone Interconnect. The WB_INTERCON peripheral ... in more detail: Pin Description Interfacing Configuration See Also WB_DUALMASTER - Configurable Wishbone Dual Master WB_MULTIMASTER - ...

    admin - 11/06/2013 - 09:09

  9. WB_INTERCON - Configurable Wishbone Interconnect

    Figure 1. WB_INTERCON - Configurable Wishbone Interconnect. The WB_INTERCON peripheral ... in more detail: Pin Description Interfacing Configuration See Also WB_DUALMASTER - Configurable Wishbone Dual Master WB_MULTIMASTER - ...

    admin - 09/13/2017 - 15:32

  10. WB_MULTIMASTER - Configurable Wishbone Multi-Master

    Figure 1. WB_MULTIMASTER - Configurable Wishbone Multi-Master. The WB_MULTIMASTER peripheral ... I/O devices, it has an important advantage over the WB_DUALMASTER – its support for passing interrupts from a connected Wishbone ... in more detail: Pin Description Interfacing Configuration See Also WB_INTERCON - ...

    admin - 11/06/2013 - 09:09

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