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  1. WB_I2CM - Wishbone I2C Master Controller

    Figure 1. WB_I2CM - Wishbone I2C Master Controller. The I2C Master Controller component ... changing their state in accordance with requests from the host processor.   Supply of the I2C soft core under the terms and ...

    admin - 11/06/2013 - 09:09

  2. WB_I2CM - Wishbone I2C Master Controller

    Figure 1. WB_I2CM - Wishbone I2C Master Controller. The I2C Master Controller component ... changing their state in accordance with requests from the host processor.   Supply of the I2C soft core under the terms and ...

    admin - 09/13/2017 - 15:32

  3. WB_I2CM - Host to Controller Communications

    Communications between a 32-bit host processor and the WB_I2CM are carried out over a standard Wishbone bus interface. For a generic ...

    admin - 11/06/2013 - 09:09

  4. WB_I2CM - Host to Controller Communications

    Communications between a 32-bit host processor and the WB_I2CM are carried out over a standard Wishbone bus interface. For a generic ...

    admin - 09/13/2017 - 15:32

  5. WB_I2CM - Operational Overview

    After an external reset, the WB_I2CM is effectively ready for use straight away. Initialization ... register (CONTROL.1) Writing the required 16-bit clock division value to the CLOCK0 (low byte) and CLOCK1 (high byte) ... The Controller will generate an interrupt to the host processor – taking INT_O line High – (provided ien bit in the ...

    admin - 11/06/2013 - 09:09

  6. WB_I2CM - Operational Overview

    After an external reset, the WB_I2CM is effectively ready for use straight away. Initialization ... register (CONTROL.1) Writing the required 16-bit clock division value to the CLOCK0 (low byte) and CLOCK1 (high byte) ... The Controller will generate an interrupt to the host processor – taking INT_O line High – (provided ien bit in the ...

    admin - 09/13/2017 - 15:32

  7. WB_I2CM - Accessible Internal Registers

    ... The following sections detail the internal registers for the WB_I2CM that can be accessed from the host processor. Control Register ... rd wr iack ien    -    Table 2. The CONTROL register bit functions. ...

    admin - 11/06/2013 - 09:09

  8. WB_I2CM - Accessible Internal Registers

    ... The following sections detail the internal registers for the WB_I2CM that can be accessed from the host processor. Control Register ... rd wr iack ien    -    Table 2. The CONTROL register bit functions. ...

    admin - 09/13/2017 - 15:32

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