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The following table lists the differential I/O standards supported by the XC4VLX25-10FF668C device.

Imagecaption
Table 1. Supported differential I/O standards.
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<DIV align="center"><b>I/O Standard</b></DIV>
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<DIV align="center"><b>Description</b></DIV>

BLVDS_25

Bus Low-Voltage Differential Signaling (2.5V)

DIFF_HSTL_II

Differential High-Speed Transceiver Logic (1.5V) Class II

DIFF_HSTL_II_18

Differential High-Speed Transceiver Logic (1.8V) Class II

DIFF_SSTL18_II

Differential Stub Series Terminated Logic (1.8V) Class II

DIFF_SSTL2_II

Differential Stub Series Terminated Logic (2.5V) Class II

LDT_25

Lightning Data Transport (2.5V) - also referred to as Hypertransport™

LVDS_25

Low-Voltage Differential Signaling (2.5V)

LVDSEXT_25

Extended Low-Voltage Differential Signaling (2.5V)

LVPECL_25

Low-Voltage Positive Emitter-Coupled Logic (2.5V)

RSDS_25

Reduced Swing Differential Signaling (2.5V)

ULVDS_25

Ultra Low-Voltage Differential Signaling with Differential Termination (2.5V)

For more information, refer to the Virtex-4 FPGA User Guide (ug070.pdf), available at www.xilinx.com.