After JTAG, the second most important communications system on the NanoBoard 3000 involves communications with devices over a Serial Peripheral Interface (SPI) bus.
In part, SPI communications on the NanoBoard 3000 is similar to that found on the NanoBoard NB2 – a number of SPI slave resources accessible by multiple masters over a common, multiplexed SPI bus. However, the NanoBoard 3000 also provides several dedicated, direct SPI links to resources that are only for use by an FPGA design running within the User FPGA.
Use the following linked pages to take a closer look at how the SPI bus protocol is used on the NanoBoard 3000 to facilitate communications with various SPI-compatible resources in the system.
SPI Background
NanoBoard 3000 SPI System Overview
Interface Wiring
Accessing the Common SPI Bus from an FPGA Design
Using SPI Flash Memory as Embedded Memory